Computer+Architectures

=Von Neumann Architecture=

Initially programs and data were stored in separate locations but John von Neumann, a Hungarian-born American (not German ;)) computer scientist popularised the idea of both of these being stored in the same location. Von Neumann architecture follows the //fetch-decode-execute// cycle and to do this it requires special //registers// (specialised sections of memory to do a specific job) outside of the main memory. Having registers stored outside the main memory is beneficial as they are used almost all of the time, so need to be accessed quickly. However, there can't be too many registers stored like this, as it would be expensive to make computers that do this.

The registers are:
 * **Program Counter (PC) -** stores the memory location of the next instruction to be completed
 * **Current Instruction Register (CIR)** - stores the instruction that is currently being completed
 * **Memory Address Register (MAR)** - stores the memory location of the instruction that is currently being completed
 * **Memory Data Register (MDR)** - stores the data inside the location in the MAR
 * **Accumulator** - stores results of calculations

The registers are all stored in the //Control Unit//, except for the //Accumulator// which is stored in the //ALU//

=Fetch-Decode-Execute Cycle=

The Fetch-Decode-Execute cycle uses the registers to execute instructions:

Fetch:
 * 1) Processor copies what's in the PC to the MAR
 * 2) PC changed for next instruction
 * 3) Instruction copied into MDR
 * 4) Instruction copied from MDR to CIR

Decode:
 * 1) Instruction decoded after the address in instruction is copied to the MAR and the data copied to the MDR

Execute:
 * 1) Instruction executed

=Other types of processors= = =
 * Co Processors -** Processors that are designed with special registers that are big enough to handle bigger numbers and floating point numbers. They are useful for more complicated calculations, as they speed up the processing of these.


 * Parallel Processors** - Several processors working in parallel with each other. They are useful as more than one process can be done at one time, so it is faster, although they have to be specially programmed, as if they use programs written for normal processors the other processors may spend lots of time waiting for instructions.


 * Array Processors -** Processors that have more than one ALU, so can do calculations with whole arrays at the same time.

=RISC and CISC=


 * CISC (Complex Instruction Set Coding)**is a processor architecture that has a large and complicated instruction set and R**ISC (Reduced Instruction Set Coding)** is a processor architecture with a simplified instruction set with simple instructions.

RISC uses severeal simple instructions to perform a complex CISC instruction. A large set of instructions is generally slower, so RISC is usually faster than CISC.